Clock signals which are not synchronous with one another occur in various digital electronic apparatuses. In order to transfer data which are based on one of the clocks into devices with another clock, these data can be written to a register from which they are read with the other clock. Thus, by way of example, in the case of memory devices which are operated with different nonsynchronous clocks for writing and reading, devices for measuring the occupancy are known, in order to prevent the memory from becoming empty or overflowing. These devices for measuring the occupancy are fed data which state how often reading or writing has been effected. From one source of these data, the above-described conversion of the data into the clock pattern of the other data is necessary in this case.
In the case of the registers comprising a plurality of memory cells, however, it can happen that when the read-out clock is applied, a new data word has not yet been completely written to the register, so that only some of the memory cells are occupied by the bits of the new data word, while other memory cells still have the bits of the old data word. This violation of the setup and/or hold time leads to an error which can become apparent through a disturbance of the entire device.